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Gather/scatter (vector addressing)
Definition
In vector addressing, gather and scatter are operations that read or write multiple data elements using a set of memory indices. A gather collects selected elements into a vector, while a scatter stores vector elements at selected locations. The locations need not be consecutive, which makes these operations useful for irregular data access.
What it means
A normal contiguous vector load reads neighboring elements from memory. A gather instead uses a vector of positions, allowing each lane to select a different location. Scatter performs the corresponding indexed writes. This entry concerns vector memory addressing, not MPI collective communication or scatter-gather file input/output, although the names express a similar idea of collecting and distributing information. Hardware instructions, programming libraries and array frameworks can expose related operations with different detailed semantics.
How it works
Each active vector lane calculates an address from an index and the relevant base and scaling rules. Gather reads from those addresses into the corresponding lanes; scatter writes lane values to the calculated destinations. Masks may disable selected lanes in supported implementations. Performance depends on cache locality, memory layout and the number of distinct memory regions accessed. Conflicting scatter destinations require special care because an ordinary scatter is not automatically an atomic accumulation or a deterministic reduction.
Three practical examples
- A sparse computation gathers the vector elements referenced by stored column indices before performing arithmetic.
- An image-processing operation reads selected neighboring pixels whose positions are described by an index array.
- An AI embedding lookup gathers rows associated with selected token identifiers. The framework may implement this with a variety of lower-level operations rather than one particular CPU instruction.
Think of it this way
Think of collecting books from a list of shelf positions into a tray, then distributing books to another list of positions. The list controls the order in the tray, not the physical order on the shelves. The analogy is limited because computer operations have exact rules for active lanes, address calculation and conflicting writes; two items sent to the same location do not automatically combine.
Worked example
Let an array A contain [10, 20, 30, 40, 50]. Using zero-based indices [4, 1, 3], a gather produces [50, 20, 40]. Now scatter the values [7, 8, 9] into a separate five-element zero-filled array B at indices [0, 3, 4]. The result is [7, 0, 0, 8, 9]. These destinations are distinct. If two lanes instead target index 3, the outcome must be determined from the specific operation's conflict rules; it should not be assumed to equal the sum of their values.
Illustrative case study
Fictional case: Pine Simulation uses indexed accesses for an irregular mesh. The team compares the original ordering with a layout that keeps frequently accessed neighbors closer in memory. It also identifies an update stage where several elements contribute to the same destination and replaces a naive scatter assumption with an appropriate accumulation method. The fictional case illustrates locality and conflict analysis, not a promised speedup from vector instructions.
Common misconceptions and mistakes
Do not assume arbitrary indexed access is as fast as contiguous access. A single vector instruction can still require several memory transactions. Do not confuse a gather with merely permuting values already inside registers; one accesses memory while the other rearranges available data. Out-of-range indices remain errors or invalid accesses under the relevant environment. Duplicate scatter indices can create ambiguous or unsafe updates unless the specified operation handles them. Also, support for gather does not imply identical support for scatter on every architecture.
Business use
Businesses encounter gather/scatter indirectly through numerical libraries, databases, graph processing and AI frameworks. Performance work should examine the actual access pattern rather than assume that vectorization alone solves a bottleneck. Consider whether changing data layout or batching requests can improve locality. For AI, irregular lookups and sparse updates may be limited by memory movement rather than arithmetic throughput. Validate numerical and indexing behavior before comparing speed, especially when replacing accumulation with a lower-level operation.
People also ask
Can gather read repeated indices?
Many interfaces allow it, producing repeated selected values, but consult the specific operation's rules.
Is scatter the inverse of gather?
It is a corresponding write operation, but duplicates, overwritten values and missing locations mean it is not generally a reversible inverse.
Does one instruction mean one memory access?
No. The processor may need multiple internal memory operations to serve the selected addresses.
Check your understanding
Two scatter lanes write 5 and 6 to the same destination. Can the program assume the destination becomes 11?
Answer: No. Ordinary scatter does not imply addition. The program needs an explicitly defined accumulation or conflict-handling mechanism.
Related terms
- Sparse matrix
- vector addressing
- SIMD
- memory locality
- masked operation
- atomic update
- indexed load
Learn next
Perform a gather and a scatter by hand with a small array and explicit zero-based indices. Add repeated indices and compare the required semantics of overwrite and accumulation. Then inspect the documented operation used by the actual language or hardware.
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Sources
Primary vendor references: Intel, Intrinsics for Gather Operations, https://www.intel.com/content/www/us/en/docs/cpp-compiler/developer-guide-reference/2021-8/intrinsics-for-gather-operations.html ; Intel Intrinsics Guide, https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html ; Intel compiler guide, https://www.intel.com/content/dam/develop/external/us/en/documents/cpp_compiler_classic.pdf . Official excerpts consulted for indexed vector operations. Examples are original; instruction-specific conflict and editorial review remain pending.
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